Koppala, Naresh Kumar (2009) VLSI Implementation of Pipelined Quadratic Function. MTech thesis.
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Arithmetic circuits form an important class of circuits in digital systems. In particular, Multiplication is especially relevant since other arithmetic operators such as division or exponentiation, usually utilizes multiplier as building blocks. As the need for faster computation increases, the need for exploring ways to both quickly and accurately performing the multiplication also increases. So, here we go for Booth’s ordering than Booth’s multiplication. It provides high performance than other multiplication algorithms.
Very often quadratic and cubic functions are used specifically in the field of cryptography, it is quite relevant at present to implement the pipelined quadratic function and therefore, it has been implemented.
|Item Type:||Thesis (MTech)|
|Uncontrolled Keywords:||vlsi implementation, pipelined qudratic function, quadratic polynomial, booth's algorithm, robertson's algorithm, number systems|
|Subjects:||Engineering and Technology > Electronics and Communication Engineering > VLSI|
|Divisions:||Engineering and Technology > Department of Electronics and Communication Engineering|
|Deposited By:||Mr. Naresh Kumar Koppala|
|Deposited On:||06 Jun 2009 10:11|
|Last Modified:||06 Jun 2009 10:11|
|Supervisor(s):||Rath, G S|
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