ASIP design based on CORDIC algorithm using Xilinx and CoWare designer tools

Abstract

Efficient generation of trigonometric as well as exponential functions without much increase in hardware complexity has always been a challenge, owing mainly to their importance and widespread use in Digital Signal Processing applications besides other areas. One such algorithm which is very much effective for the calculation of trigonometric, hyperbolic, exponential, linear and logarithmic functions is the CORDIC algorithm. The algorithm is very much hardware efficient because it omits the dependence on multipliers and is rather a combination of shift-add operations.
Application Specific Instruction-set Processors (ASIPs) are a type of processor that serve as a compromise between General Purpose Processors (GPPs) and Single Purpose Processors (SPP). Their data-path can be optimized for a particular class of operations such as embedded control, Digital Signal Processing (DSP) applications etc. This project deals with the design of an ASIP based on the CORDIC algorithm using two very popular hardware designing tools, i.e , Xilinx Integrated Development Environment (IDE) from Xilinx corporations, Inc. and LISA 2.0 description language and processor designing environment from CoWare.