Enugu , Sudheer Reddy (2008) FPGA Implementation of RC6 algorithm for IPSec protocol. MTech thesis.
With today's great demand for secure communications systems, there is a growing demand for real-time implementation of cryptographic algorithms. In this thesis we present a hardware implementation of the RC6 algorithm using VHDL Hardware Description Language. And the goal of the thesis was to implement a subset of the IPSec protocol using a Microcontroller and an FPGA. IPSEC is a framework for security that operates at the Network Layer by extending the IP packet header. IPSec protocol is to guarantee the security of data while traveling through the network. The motivation was to enable network application and cryptography to assembly and VHDL languages and to develop a prototype of their system. In this thesis many different sub-systems had to communicate with each other to achieve the final product: the PC and the Microcontroller through a serial connection, the Microcontroller and the FPGA through a bidirectional bus, and the Microcontroller and a terminal using a serial connection. Data was to be encrypted and decrypted using an RC6 algorithm including key scheduling application. The crypto-coprocessor (to implement RC6 algorithms) was implemented within an FPGA and connected to the Microcontroller bus.
|Item Type:||Thesis (MTech)|
|Uncontrolled Keywords:||VLSI DESIGN and EMBEDDED SYSTEM|
|Subjects:||Engineering and Technology > Electronics and Communication Engineering > VLSI|
|Divisions:||Engineering and Technology > Department of Electronics and Communication Engineering|
|Deposited By:||Hemanta Biswal|
|Deposited On:||10 Jul 2012 11:14|
|Last Modified:||10 Jul 2012 11:14|
|Supervisor(s):||Mahapatra, K K|
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