Design and Simulation of SIGMA DELTA ADC

Abstract

Analog-to-digital converters play an essential role in modern RF receiver design.Conventional Nyquist converters require analog components that are precise andHighly immune to noise and interference. In contrast, oversampling converters can be implemented using simple and high-tolerance analog components. Moreover,Sampling at high frequency eliminates the need for abrupt cutoffs in the analog antialiasing filters. A technique of noise shaping is used in Ó-Ä converters in addition to oversampling to achieve a high-resolution conversion. A significant advantage of the method is that analog signals are converted using simple and high-tolerance analog circuits, usually a 1-bit comparator, and analog signal processing circuits having a precision that is usually much less than the resolution of the overall converter. In this paper, the design technique for a low-cost first order narrow band sigma-delta modulator in a standard 0.9ìm CMOS technology is described .This circuitry performs the function of an analog-to-digital converter. A first-order 1-bit sigma-delta (Ó-Ä) analog-to-digital converter is designed and simulated using Cadence 0.9ìm CMOS process technology with power supply of 1.8 V through Cadence. The analysis of sigma-delta modulator structures and the design flow were given. The modulator is proved to be robustness, the high performance in stability .The simulation are compared with those from a traditional analog-to-digital converter to prove that sigma-delta is performing better in the case of weak signals acquisition. The design flow consist of a op-amp one of the key component of sigma delta adc which is used for designing of integrator and summing circuit , followed by a high speed comparator and a digital -to-analog convertor in the feedback path.