ATLAS simulation based characterization of Recessed-S/D FD SOI MOSFETs with non-uniform lateral doping

Abstract

As scaling down the technology into nanometer regime, short channel effects (SCE) and manufacturing limits will increase, which alters the performance of devices. Silicon-on-insulator (SOI) has got reputation that is a promising technology in the last decade offering more CMOS devices with higher density, higher speed, and reduced second order effects for submicron VLSI applications. Recent investigations have been reported fully depleted (FD) SOI devices are the best solutions because of their suitability to shrinking methods comparative to bulk silicon CMOS devices. Further, implicit the extra advantages, like sub threshold current reduction and improvement in Analog/RF performance; channel engineering and source/drain engineering techniques are implemented in FD SOI MOSFET. Recessed FD SOI MOSFET with non-uniform lateral doping structure gives some solutions to SCEs and better device performance by changing doping levels in different length ratios of channel region in lateral direction In this project work, a comprehensive performance study of source/drain (S/D) engineered SOI MOSFET with non-uniform doping in Channel region is presented. To analyse the characterisation of proposed structure, all the characteristics parameters extracted by using simulation tool. Those characteristics parameters are Surface potential, Threshold voltage, Sub-threshold current, Device capacitances, Drain current, Transconductance, Output conductance, Transconductance generation efficiency, Cut-off frequency and Maximum frequency of oscillation have been carried out and compared with its SOI MOSFETs and non-S/D engineered ones. To extract the characteristics parameters of Device H and Y-parameters are used. All these numerical simulation results are performed using ATLASTM, a 2-D numerical device simulator from SILVACO Inc.