Modeling and simulation of subthreshold characteristics of fully-depleted recessed-source/drain UTB SOI MOSFETs including substrate induced surface potential effects

Abstract

With the introduction of Silicon-on-Insulator MOSFET, the device technology has witnessed the scaling from tens of micrometer to tens of nanometer. It has gone through multiple successful structural modifications and still is in research to reintroduce it into sub 10nm era. In the work the recessed source/drain structure is being explored down to 10nm channel length. A two-dimensional channel surface potential of Re-S/D SOI MOSFET has been developed using evanescent model with substrate induced surface potential effects. The channel potential is broken into one-dimensional long-channel potential and two-dimensional short-channel effective potential. The front and back surface of channel are studied for dominance in current drive capacity and threshold voltage has been formulated accordingly. To model the substrate induced surface potential (SISP) effects at substrate/buried-oxide interface a one-dimensional Poisson’s equation has also been solved in the substrate region. The generalized surface potential model together with SISP effects consideration improves the accuracy of the threshold voltage and subthreshold characteristic model. MATLAB has been utilized to find the numerical model results for variations in the device parameters and the corresponding results have been verified using device simulator ATLASTM from Silvaco. The model and simulation results have been plotted together and accuracy of model was verified.