Bidirectional Network-on-Chip Router Implementation Using VHDL

Abstract

Network-on-chip (abbreviated as NoC) is emerging as a very reasonable and efficient answer for connecting the numerous cores in a System-on-Chip (abbreviated as SoC). Neighboring routers are connected through unidirectional communication channels in conventional Network-on-Chip architectures. Due to the uneven and unpredictable nature of traffic patterns in NoC, in one channel overflow might occur due to intense traffic in one direction but the other unidirectional channel is idle, hence causing performance degradation, loss of data and incompetent resource utilization. Bidirectional NoC (BiNoC) is used as a cure for this problem. It uses bidirectional channels to connect neighboring routers and supports recomputation of channel direction according to traffic demand during runtime by using CDC (channel direction control) protocol. Objective of this project is to design a packet switched Bidirectional NoC (BiNoC) having features like wormhole flow control, XY routing algorithm and 2-D mesh topology. The design architecture is coded using VHDL and simulated using Xilinx ISE tools.