FPGA Implementation of Visual Object Tracking System

Abstract

Object tracking is a crucial problem of computer vision, due to the high dimensional data processing, which required huge memory resource to hold the intermediate image data. Due to complexity in real time object tracking, this field is very challenging for researchers. In today’s world technology high speed and low power computers, and cheap and high definition cameras availability increase the interest of researcher in object tracking systems. In computer vision task real time object tracking is becoming challenging ingredient. Here a new approach for real time object tracking is taking place to implement on a reconfigurable hardware. Reconfigurable hardware is best target hardware for video processing algorithms, because they use parallel processing in contrast to conventional processor, which they process data serially. A novel video processing algorithm for tracing object in consecutive frames is implemented here on the FPGA based hardware. The algorithm is based on machine learning’s algorithm of discriminative classifier. The central objective of my work is to track object in real time with less hardware complexity. The FPGA based VLSI architecture for tracking-by-detection based object tracking system was implemented and verified in Altera Quartus II tool and FPGA board. The target device for reconfigurable hardware was Altera cyclone II EP2C35F672C6 FPGA. The bottleneck in this architecture is FFT, because FFT is the main block which is used repetitively in the hardware. Hence to emphasized hardware pipelined single delay feedback FFT block with Cordic was implemented. Cordic was used for twiddle factor and exponential function calculation.