Biswal, Debashis (2016) A Segmented 8-Bit Resistor String DAC for SAR ADC. MTech thesis.
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Precision Digital-to-Analog converters (DAC) convert the digital representation of the real world events back into the analog domain.A DAC should have proper Monotonicity.The proposed architecture consists of an 8-bit resistor string DAC realized as a segmented DAC consisting of a 3 bit MSB Coarse DAC and a 5-bit LSB Fine DAC.The outputs of the LSB and MSB DAC’s are given to a capacitive charge sharing DAC (CDAC),whose outputs act as differential input to the comparator of a SAR ADC.The variations in the mismatches of the Resistors (used in the string ladders) would be observed for the different floorplans in the layout.The effect of systematic and random mismatches would be seen and after the fabrication is done,based on the statistical data available,the proportion of these systematic and random mismatches would be analyzed from the INL and DNL curves and the causes of variations of these mismatches based on the different floorplans used during the layout would be figured out.The adopted technology has 2 poly and 8 metal layers and 65nm CMOS with nominal supply of 1.1V.
|Item Type:||Thesis (MTech)|
|Uncontrolled Keywords:||Resistor String Ladder; Decoder; Mismatches; Linear and Quadratic Gradient|
|Subjects:||Engineering and Technology > Electronics and Communication Engineering > VLSI|
|Divisions:||Engineering and Technology > Department of Electronics and Communication Engineering|
|Deposited By:||Mr. Sanat Kumar Behera|
|Deposited On:||02 Jan 2018 14:24|
|Last Modified:||02 Jan 2018 14:24|
|Supervisor(s):||Acharya, Debiprasad Priyabrata|
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