Satheesh, Naini (2016) Securing IEEE P1687 On-chip Instrumentation Access Using PUF. MTech thesis.
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Abstract
As the complexity of VLSI designs grows, the amount of embedded instrumentation in system-on-a-chip designs increases at an exponential rate. Such structures serve various purposes throughout the life-cycle of VLSI circuits, e.g. in post-silicon validation and debug, production test and diagnosis, as well as during in-field test and maintenance. Reliable access mechanisms for embedded instruments are therefore key to rapid chip development and secure system maintenance. Reconfigurable scan networks defined by IEEE Std. P1687 emerge as a scalable and cost-effective access medium for on-chip instrumentation. The accessibility offered by reconfigurable scan networks contradicts security and safety requirements for embedded instrumentation. Embedded instrumentation is an integral system component that remains functional throughout the lifetime of a chip. To prevent harmful activities, such as tampering with safety-critical systems, and reduce the risk of intellectual property infringement, the access to embedded instrumentation requires protection. This thesis provides a novel, Physical Unclonable Function (PUF) based secure access method for on-chip instruments which enhances the security of IJTAG network at low hardware cost and with less routing congestion.
Item Type: | Thesis (MTech) |
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Uncontrolled Keywords: | IEEE 1687-2014; Physical unclonable function; Hardware security, LFSR |
Subjects: | Engineering and Technology > Electronics and Communication Engineering > VLSI |
Divisions: | Engineering and Technology > Department of Electronics and Communication Engineering |
ID Code: | 8608 |
Deposited By: | Mr. Sanat Kumar Behera |
Deposited On: | 20 Aug 2017 13:58 |
Last Modified: | 06 Dec 2019 14:46 |
Supervisor(s): | Mahapatra, K |
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