To Design and Develop Photo Voltaic Power Harvesting System Using MPPT Technique

Abstract

Implementing a fully integrated and ultra-low power photo voltaic power harvesting system is very crucial. Here, a fully integrated harvesting system is implemented in 0.18-μm CMOS technology. Due to continuous change in temperature and light intensity output of PV cell (Voc and Isc) thus, the maximum power and MPP will change. So, a proper MPPT algorithm is needed. A hill-climbing algorithm is implemented which tracks the maximum power point. Charge pump is the immediate load of the PV cell. It is implemented and it acts as dc-dc converter and voltage multiplier. In our design3*Vsolar i.e. voltage tripler is designed, where Vsolar is the output of PV cell. For transferring power from source to load the impedance of source and load should be matched. For this purpose, a digitally programmable capacitor bank is designed which is connected in parallel to each of the power capacitors of the charge pump. Since, output of the PV cell will give current in few microamperes it will be difficult for the subsystem to respond and perform current division and biasing to many system blocks. For that a power efficient current sensor is designed. The current sensor will record the harvested energy. MPPT processing unit is implemented which consist of transmission gate, S/H circuit, a latched comparator, combination of Xnor and D-latch and FSM controller. The current sensor will evaluate output power and simultaneously S/H channel is triggered which record the present power available. The comparator will compare the output powers and the digital circuit is triggered. The digital part will operate on low voltage and hence, contribute very less to the overall power dissipation by the harvesting system. Super capacitor is used for buffering, filtering purpose and energy storing. The range of the output is from 3.0 and 3.75 V for different device loads. The off-chip load may be sensor, SOC or wireless transceiver.