Design of Phase Locked Loop

Bahali, Santanu Kumar and Dash, Subrat (2009) Design of Phase Locked Loop. BTech thesis.



In the optical communication in a backbone infra structure, flexibility means, for example, programmable bitrates requiring a PLL with robust operation over a wide range of frequency range. A wide range PLL could be used by different protocols and applications so that
we maximize the reusability and reduce time to market.
In this report we try to present an extended frequency CMOS monolithic VCO design. A negative feedback control algorithm is used to automatically adjust the VCO range according to control voltage. Based on this analog feedback control algorithm, the VCO achieves a wide
range without any pre-register settings.
Here we discuss about different component of PLL (Phase Lock Loop), mainly on Phase Frequency Detectors and VCO (voltage controlled oscillator). Here we proposed different architecture of Phase frequency detectors and also of VCOs and designed many architecture in mentor graphics.

Item Type:Thesis (BTech)
Uncontrolled Keywords:PLL-Phase Locked Loop,VCO- Voltage Controlled Oscillator
Subjects:Engineering and Technology > Electronics and Communication Engineering > VLSI
Engineering and Technology > Electronics and Communication Engineering > Signal Processing
Divisions: Engineering and Technology > Department of Electronics and Communication Engineering
ID Code:1002
Deposited By:Santanu Bahali
Deposited On:14 May 2009 17:05
Last Modified:13 Jun 2012 17:15
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Supervisor(s):Acharya, D P

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