Dash, R and Ghosh, D (2010) Design Analysis of PLL Components. BTech thesis.
Contemporary digital systems use clocks for sequencing their operations and for synchronizing between different functional units. Data-transfer rates and clock frequencies have been constantly increasing with every generation of processing technology .Phase locked-loops (PLLs) are widely used in order to generate well-timed on-chip clocks to be used in high-performance digital systems. A PLL is a closed loop system that locks the phase of its output signal to an input reference signal. PLL‗s are widely used in radio, computer and telecommunications systems where it is necessary to stabilize a generated signal or to detect incoming signals.
In this report we design and discuss about different component of PLL (Phase Lock Loop), mainly on Phase Frequency Detectors and VCO (voltage controlled oscillator).
|Item Type:||Thesis (BTech)|
|Uncontrolled Keywords:||PLL,Phase Locked Loop|
|Subjects:||Engineering and Technology > Electronics and Communication Engineering > Wireless Communications|
Engineering and Technology > Electronics and Communication Engineering > Signal Processing
Engineering and Technology > Electronics and Communication Engineering > Data Transmission
|Divisions:||Engineering and Technology > Department of Electronics and Communication Engineering|
|Deposited By:||Dipankar Ghosh|
|Deposited On:||14 May 2010 11:53|
|Last Modified:||13 Jun 2012 17:17|
|Supervisor(s):||Acharya, D P|
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