Naidu, Ramesh G. (2007) MP3 Hardware and Audio Decoder. MTech thesis.
| PDF 2542Kb |
Abstract
The thesis titled “MP3 Hardware Audio decoder” describes about the hardware and software
resources for decoding the MPEG1 bitstream. The dual architecture model in the hardware
with instruction set tailored for audio decoding helps to reduce number of cycles and
memory. The coding was done in assembly and testing was carried out in “model Sim”, with
compliance bit streams for correctness of decoder
Item Type: | Thesis (MTech) |
---|---|
Uncontrolled Keywords: | hardware implementation, DSP, MP3 |
Subjects: | Engineering and Technology > Electronics and Communication Engineering > Signal Processing |
Divisions: | Engineering and Technology > Department of Electronics and Communication Engineering |
ID Code: | 19 |
Deposited By: | Prof Sarat Patra |
Deposited On: | 23 Apr 2009 23:52 |
Last Modified: | 14 Jun 2012 16:31 |
Supervisor(s): | Patra, S K |
Repository Staff Only: item control page