# CFD analysis of electronics chip cooling

Patra, Saroj Kumar (2007) CFD analysis of electronics chip cooling. MTech thesis.  Preview
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## Abstract

Since the development of the first electronic digital computers in the 1940s, the effective removal of heat has played a key role in ensuring the reliable operation of successive generations of computers. As day by day the size of the electronic instruments decreases drastically and simultaneously the number of functions per chip increases hugely. So it’s a great challenge to packaging engineers to remove the heat generated by the chip efficiently. Many researches are going on in this direction for the past few decades. In the last decade or so CFD simulations have become more and more widely used in studies of electronic cooling. Validation of these simulations has been considered to be very important. In this study we are analyzing the cooling effects of the chip by modeling the geometry numerically. We have considered a single chip module. The modeling is carried out by solving the governing equations for a flow through a channel via obstruction. The case we have considered is transient laminar flow. The method we have used here to discretize the governing equations, namely the continuity equation, the momentum equation and the energy equation is Finite Difference Method (FDM). To solve the problem the algorithm we have used is Marker and Cell (MAC) method, and to discretize the convective term we have used the weighted second upwind and space centered difference. The diffusive terms are discretized by central difference scheme. The entire algorithm was written in FORTRAN-90. The geometry and the boundary conditions we have considered is for general applicability, that’s why we have non-dimensionalized the variables. In the discretization we have considered equal increment in both x-direction and y- direction. We have considered the domain 198 nodes in x-direction and 32 in y-direction. The case we are considering is constant temperature conditions. The temperature of the wall and that of the chip were considered to be unity and that of the inlet velocity temperature is considered to be zero. So the entire temperature range falls in between zero and one. The obstruction size we have considered are 3x3, 7x7, 11x11, and 15x 15, that means the blockage ratio nearly varies from 0.1 to 0.5. All the above cases are considered by varying the Reynolds number as 300, 600, 900, and 1200 that means all are in the laminar zone. After conducting the simulations we found the results, and by using different software packages like Surfer-32, Origin 6.1, and Grapher 1.09, we have plotted different contours of pressure and temperature, velocity profiles and variation of Nusselt number. Finally the outputs or graph and contours are analyzed for the process. In appendix-A, we have presented the output of FLUENT, which is simulated with same boundary conditions. So the results can be compared with it.

Item Type: Thesis (MTech) CFD, Electronics chip cooling, FDM, MAC, FORTRAN-90, FLUENT Engineering and Technology > Mechanical Engineering Engineering and Technology > Department of Mechanical Engineering 4339 Hemanta Biswal 10 Jul 2012 16:59 20 Dec 2013 10:17 Satapathy, A K

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