Intra-Key-Frame Coding and Side Information Generation Schemes in Distributed Video Coding

Rup, Suvendu (2013) Intra-Key-Frame Coding and Side Information Generation Schemes in Distributed Video Coding. PhD thesis.

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Abstract

In this thesis investigation has been made to propose improved schemes for intra-key-frame coding and side information (SI) generation in a distributed video
coding (DVC) framework. From the DVC developments in last few years it has
been observed that schemes put more thrust on intra-frame coding and better
quality side information (SI) generation. In fact both are interrelated as SI
generation is dependent on decoded key frame quality. Hence superior quality
key frames generated through intra-key frame coding will in turn are utilized to
generate good quality SI frames. As a result, DVC needs less number of parity
bits to reconstruct the WZ frames at the decoder. Keeping this in mind, we have
proposed two schemes for intra-key frame coding namely,
(a) Borrows Wheeler Transform based H.264/AVC (Intra) intra-frame coding
(BWT-H.264/AVC(Intra))
(b) Dictionary based H.264/AVC (Intra) intra-frame coding using orthogonal
matching pursuit (DBOMP-H.264/AVC (Intra))
BWT-H.264/AVC (Intra) scheme is a modified version of H.264/AVC (Intra)
scheme where a regularized bit stream is generated prior to compression. This
scheme results in higher compression efficiency as well as high quality decoded
key frames. DBOMP-H.264/AVC (Intra) scheme is based on an adaptive
dictionary and H.264/AVC (Intra) intra-frame coding. The traditional transform
is replaced with a dictionary trained with K-singular value decomposition (K-SVD)
algorithm. The dictionary elements are coded using orthogonal matching pursuit
(OMP).
Further, two side information generation schemes have been suggested namely,
(a) Multilayer Perceptron based side information generation (MLP - SI)
(b) Multivariable support vector regression based side information generation
(MSVR-SI)
MLP-SI scheme utilizes a multilayer perceptron (MLP) to estimate SI frames
from the decoded key frames block-by-block. The network is trained offline using
training patterns from different frames collected from standard video sequences.
MSVR-SI scheme uses an optimized multi variable support vector regression
(M-SVR) to generate SI frames from decoded key frames block-by-block. Like
MLP, the training for M-SVR is made offline with known training patterns apriori.
Both intra-key-frame coding and SI generation schemes are embedded in
the Stanford based DVC architecture and studied individually to compare
performances with their competitive schemes. Visual as well as quantitative
evaluations have been made to show the efficacy of the schemes. To exploit the
usefulness of intra-frame coding schemes in SI generation, four hybrid schemes
have been formulated by combining the aforesaid suggested schemes as follows:
(a) BWT-MLP scheme that uses BWT-H.264/AVC (Intra) intra-frame
coding scheme and MLP-SI side information generation scheme.
(b) BWT-MSVR scheme, where we utilize BWT-H.264/AVC (Intra)
for intra-frame coding followed by MSVR-SI based side information
generation.
(c) DBOMP-MLP scheme is an outcome of putting DBOMP-H.264/AVC
(Intra) intra-frame coding and MLP-SI side information generation
schemes.
(d) DBOMP-MSVR scheme deals with DBOMP-H.264/AVC (Intra)
intra-frame coding and MSVR-SI side information generation together.
The hybrid schemes are also incorporated into the Stanford based DVC
architecture and simulation has been carried out on standard video sequences.
The performance analysis with respect to overall rate distortion, number requests
per SI frame, temporal evaluation, and decoding time requirement has been made
to derive an overall conclusion.

Item Type:Thesis (PhD)
Uncontrolled Keywords:Distributed video coding, orthogonal matching pursuit, multilayer perceptron, support vector regression, intra-frame coding, side information, temporal evaluation, rate distortion, peak signal to noise ratio.
Subjects:Engineering and Technology > Computer and Information Science > Image Processing
Divisions: Engineering and Technology > Department of Computer Science
ID Code:5475
Deposited By:Hemanta Biswal
Deposited On:06 Feb 2014 11:28
Last Modified:06 Feb 2014 11:28
Supervisor(s):Majhi, B

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