Mohanty, Pratap Ranjan (2018) Topological Issues in PFC Circuit and Nonlinear Controller for Improving Dynamic Performance of AC-DC System. PhD thesis.
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Abstract
In an automation, computation and control era, the requirement of advanced, sophisticated equipment becomes more signicant. The vertical growth of such equipment necessitates a current prorble which is horrible for the supply lines. Generally, this equipment needs some kind of power conditioning unit called as rectier which acts as a nonlinear load and introduces harmonics in the supply system. Due to this undesirable feature, the source current becomes non-sinusoidal in shape. Now a day, there are several international standards that produce the idea of Power Factor Correction(PFC) to limit the line current harmonics due the nonlinear characteristics of the advanced equipment. A focused analysis on the encient switching regulation of the single-phase Boost PFC conguration has been targeted in this thesis work. The ine-cient conventional linear control scheme is being replaced by several nonlinear control techniques separately which especially has been developed for the dynamic performance improvement of the PFC system. A current-controlled Sliding Mode Control(SMC) technique is developed and implemented in single phase Boost PFC system.The proposed control-converter system ensures almost unity power factor (UPF) at line side with least input distortions. The output voltage is regulated and settled at axed desired level even under transient loading conditions. Also, the source current is made sinusoidal and in phase with line voltage under dynamic load change. In this thesis work, the performance of the single-phase Boost PFC system is improved by implementing the nonlinear controller, Dynamic Evolution Control (DEC) scheme in the inner control loop. The proposed technique is developed on linear ii evolution path approach which enforces the system dynamics towards Zero Error-State. The dynamic performance of the proposed system is explored both for steady and transient loading conditions separately atxed outer reference. The robustness of the proposed converter-controller is tested under instantaneous reference variation condition keeping the load at a xed level. The performance of the system is analyzed for light loading condition to resolve the dead-zone issue. In this thesis work, the topological issues related to the use of conventional Boost converter in high power PFC application are targeted to resolve by considering a Voltage-doubler (VD) PFC converter as the solution. The performance in term of low line efciency of the proposed VD converter is comparatively high when it operates at a duty ratio more than 0.5 (i.e., D > 0:5), which is the required key operating feature to maintain. In this thesis work, the proposed DEC technique is implemented to maintain such key operating condition. The DEC scheme is implemented in outer voltage loop and inner current loop separately which are termed as VC-DEC scheme and CC-DEC scheme respectively. The dynamic performance of the VD PFC system operating on both the schemes is investigated individually under transient loading conditions. In this thesis work, a high step-up Voltage multiplier (VM) PFC converter is deigned which resolves the topological issues of high power conventional PFC system.
The proposed converter solves the switch losses issues and the impact of reverse recovery diode current. The performance of the proposed converter system is examined
experimentally at a low-line input with high output voltage and power. The mathematical and diagrammatic descriptions are precisely presented in this thesis which describes the performance of the proposed nonlinear controller for the proposed typologies of PFC application. The practicality of the proposed configurations is authenticated in MATLABr/Simulinkr and dSPACEr1104 control platform.
Item Type: | Thesis (PhD) |
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Uncontrolled Keywords: | Power factor correction (PFC); Current control manifold; Linea Revolution path; Load variation; Voltage-doubler (VD); Voltage multiplier (VM) |
Subjects: | Engineering and Technology > Electrical Engineering > Power Transformers Engineering and Technology > Electrical Engineering > Power Electronics |
Divisions: | Engineering and Technology > Department of Electrical Engineering |
ID Code: | 9772 |
Deposited By: | IR Staff BPCL |
Deposited On: | 23 Jan 2019 16:14 |
Last Modified: | 23 Jan 2019 16:14 |
Supervisor(s): | Panda, Anup Kumar |
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