Yadav , Ashutosh Kumar (2018) *Singular Value Decomposition on FPGA for Matrix Inversion.* MTech thesis.

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## Abstract

Matrix inverse plays a vital role in many applications such as optimization problems, data analysis and solutions of linear equations. The inverse of any matrix A exist only if A is non-singular matrix. However, in many areas, for example in MIMO system in wireless communication, the need of some kind of inversion is felt for singular or rectangular matrix. The inversion in these cases is possible with the concept of pseudo-inverse. This work presents a hardware architecture for matrix inversion through SVD. The FPGA-based matrix inversion processor uses the two-sided rotation Jacobi SVD algorithm for computing the SVD. A mesh connected array structure is used to shorten the iteration of the computation and improve the implementation speed of the processor. The array is divided into an n/2×n/2 array of 2×2 processor elements to calculate the SVD of an n×n matrix. The trigonometric functions and the vector multiplication in the algorithm are suitable to use the CORDIC (Coordinate Rotation Digital Computer) algorithms for hardware-efficient solutions

Item Type: | Thesis (MTech) |
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Uncontrolled Keywords: | SVD; FPGA; Matrix inverse; Psuedo-inverse; CORDIC |

Subjects: | Engineering and Technology > Electrical Engineering > Wireless Communication Engineering and Technology > Electrical Engineering > Image Processing Engineering and Technology > Electrical Engineering > Power Electronics |

Divisions: | Engineering and Technology > Department of Electrical Engineering |

ID Code: | 9895 |

Deposited By: | IR Staff BPCL |

Deposited On: | 17 Jul 2019 20:15 |

Last Modified: | 17 Jul 2019 20:15 |

Supervisor(s): | Gupta, Supratim |

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